The x86 protection model is notoriously complex, with four privilege rings, segmentation, paging, call gates, task switches, and virtual 8086 mode. What's interesting from a hardware perspective is how the 386 manages this complexity on a 275,000-transistor budget. The 386 employs a variety of techniques to implement protection: a dedicated PLA for protection checking, a hardware state machine for page table walks, segment and paging caches, and microcode for everything else.
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直播中，小米安全专家详细拆解了事故调查的完整流程：一起交通事故或火灾事故发生后，交警、消防部门会首先封闭现场、封存车辆，随后调取各类相关数据和信息，完成现场勘查后，将召集专家进行分析研判，部分复杂事故还需经过鉴定实验，最终才能得出技术结论，这一过程需要一定时间，无法快速完成。
The main rule for data access is max(CPL, RPL) ≤ DPL. For code transfers, the rules get considerably more complex -- conforming segments, call gates, and interrupt gates each have different privilege and state validation logic. If all these checks were done in microcode, each segment load would need a cascade of conditional branches: is it a code or data segment? Is the segment present? Is it conforming? Is the RPL valid? Is the DPL valid? This would greatly bloat the microcode ROM and add cycles to every protected-mode operation.